Multi-Domain Automotive SoCs for Software-Defined Vehicles

Renesas Electronics Corporation is expanding its software-defined vehicle portfolio with a fifth-generation automotive system-on-chip designed to consolidate multiple vehicle domains onto a single, high-performance computing platform.

Consolidating vehicle domains on advanced silicon
The latest addition to Renesas’ Gen 5 R-Car family is a multi-domain automotive SoC manufactured using a 3 nm process node. The device is designed to run advanced driver assistance systems, in-vehicle infotainment, and gateway functions simultaneously, reflecting a broader shift toward centralized compute architectures in software-defined vehicles.

By moving multiple electronic control unit functions onto one SoC, automakers can reduce system complexity while enabling tighter integration between software and hardware early in the vehicle development cycle.

Performance, efficiency, and mixed criticality
Manufactured on a 3 nm process, the SoC delivers higher integration density and improved energy efficiency compared with earlier generations. Renesas reports up to 35 percent lower power consumption than comparable 5 nm solutions, an important factor for thermal management and energy budgets in electric and hybrid vehicles.

The architecture combines high-performance application processing with real-time and safety-oriented cores. It integrates 32 Arm Cortex-A720AE CPU cores alongside six Cortex-R52 lockstep cores supporting ASIL D requirements. This mixed-criticality design allows safety-relevant and non-safety workloads to run concurrently on the same device without compromising functional safety.




AI and graphics capability for next-generation workloads
As artificial intelligence becomes a core element of advanced driver assistance and user experience, the SoC is designed to deliver substantial on-device AI acceleration. It provides up to 400 TOPS of AI performance, with a chiplet-based architecture that allows acceleration to be scaled by a factor of four or more.

For visual workloads, the device includes GPU capability equivalent to 4 TFLOPS, supporting high-end graphics for digital cockpits and infotainment systems. Combined with more than 1,000k DMIPS of CPU performance, this compute envelope is intended to support real-time perception, decision-making, and rich user interfaces on a single platform.

Development platform and ecosystem readiness
Renesas has begun sampling Gen 5 silicon and is providing evaluation boards alongside its R-Car Open Access (RoX) Whitebox Software Development Kit. The RoX platform brings together hardware, operating systems, middleware, and development tools to simplify early software bring-up and validation.

As vehicle E/E architectures become more centralized, such integrated development environments are increasingly used to shorten development cycles and enable continuous software updates throughout a vehicle’s lifecycle. Within a software-defined vehicle context, this approach supports tighter alignment between silicon capabilities and application software.

Path toward production and industry adoption
Renesas is working with customers and partners to accelerate adoption of the Gen 5 platform and plans to demonstrate AI-enabled, multi-domain use cases at CES 2026. These demonstrations are expected to show how centralized compute can support simultaneous operation of ADAS, infotainment, and networking functions.

By combining advanced process technology, scalable AI acceleration, and a unified development environment, the Gen 5 R-Car platform illustrates how automotive SoCs are evolving to meet the demands of software-defined vehicles and increasingly complex automotive data ecosystems.